#ifndef __HW_H
#define __HW_H


#include "types.h"

u8* const HW_REGS =			(u8*)0x02000000;

/***** Hardware Register Mnemonics *****/
#define	CCR				0x00	// Communication Control Register	(0x0200 0000)
#define	CCSR			0x04	// COMCNT Control Register			(0x0200 0004)
#define	CDTR			0x08	// Transmitted Data Register		(0x0200 0008)
#define	CDRR			0x0C	// Received Data Register			(0x0200 000C)
#define	SDLR			0x10	// Serial Data Low Register			(0x0200 0010)
#define	SDHR			0x14	// Serial Data High Register		(0x0200 0014)
#define	TLR				0x18	// Timer Low Register				(0x0200 0018)
#define	THR				0x1C	// Timer High Register				(0x0200 001C)
#define	TCR				0x20	// Timer Control Register			(0x0200 0020)
#define		T_Clk_20uS	0x10	// Write:	Select 20 microsecond timer period
#define		T_Clk_100uS	0x00	// 			Select 100 microsecond timer period (default)
#define		Tim_Z_Int	0x08	// Write:	Enable timer zero interrupt
#define		Z_Stat_Clr	0x04	// Write:	Clear timer zero status
#define		Z_Stat		0x02	// Read:	Timer zero status: set if timer has reached 0
#define		T_Enb		0x01	// Write:	Reset countdown and start timer
#define	WCR				0x24	// Wait-state Control Register		(0x0200 0024)
#define	SCR				0x28	// Serial Control Register			(0x0200 0028)
#define		K_Int_Dis	0x80	// Clear and disable the keypad interrupt.
#define		K_Int_Enb	0x00	// Re-enable the keypad interrupt.
#define		ParaS		0x20	// When doing software loading, used to generate the latch signal.
#define		ParaH		0x00
#define		Soft_CK		0x10	// When doing software loading, a 1 written generates the transfer clock pulse.
#define		HW_SI		0x04	// The key loading by the hardware starts.
#define		SI_Stat		0x02	// It is while 1 the key loading by the hardware
#define		S_Dis		0x01	// Hardware loading suspension/inhibitation
#define		S_Abt		0x00	// Hardware loading authorization


#endif
